About: Die shrink

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Process of scaling down the size of semiconductor devices

Property	Value
dbo:description	کاهش اندازه عناصر روی یک تراشه بدون تغییر در طراحی مدار اصلی آن، به‌طوری‌که طراحی داخلی ترانزیستور ممکن است یکسان باشد یا نباشد. (fa) escalat dels dispositius MOS (ca) process of scaling down the size of semiconductor devices (en)
dbo:wikiPageExternalLink	http://www.umc.com/english/process/f.asp https://web.archive.org/web/20110823041058/http:/new.eetimes.com/electronics-news/4213880/RDA-SMIC-make-mixed-signal-IC https://web.archive.org/web/20111031070456/http:/www2.renesas.com/process/en/55nmprocess.html https://web.archive.org/web/20121107093712/http:/globalfoundries.com/technology/28nm.aspx https://web.archive.org/web/20131208074221/http:/www.globalfoundries.com/technology/40nm.aspx http://www.onsemi.com/PowerSolutions/content.do%3Fid=16649 http://www.techpowerup.com/139778/TSMC-Reiterates-28-nm-Readiness-by-Q4-2011.html http://www.eetimes.com/electronics-news/4214792/SiliconBlue-tips-FPGA-move-to-40-nm http://www.eetimes.com/electronics-news/4215986/Design-starts-triple-for-TSMC-at-28-nm http://www.eetimes.com/electronics-products/fpga-pld-products/4111039/ON-Semi-offers-110-nm-ASIC-platform
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rdfs:label	Die shrink (en) Shrink (de) Die shrink (it) 微細化 (ja) Die shrink (fr) 다이 슈링크 (ko) Die shrink (pt)
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